[1] |
廉志玲. 一种PD雷达信号处理系统的并行实现[J]. 电子科技, 2015, 28(7):5-7.
|
|
Lian Zhiling. Implementation of a parallel signal processing system of PD radar[J]. Electronic Science and Technology, 2015, 28(7):5-7.
|
[2] |
Monica D, Enrico L, Javier A. Weather radar data processing on graphic cards[J]. The Journal of Supercomputing, 2017, 74(2):868-885.
doi: 10.1007/s11227-017-2166-8
|
[3] |
Cui Z Y, Quan H B, Cao Z J, et al. SAR target CFAR detection via GPU parallel operation[J]. IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing, 2018, 11(12):4884-4894.
doi: 10.1109/JSTARS.4609443
|
[4] |
Mónica D, Areta J, Tinetti F G. Synthetic aperture radar signal processing in parallel using GPGPU[J]. The Journal of Supercomputing, 2016, 72(2):451-467.
doi: 10.1007/s11227-015-1572-z
|
[5] |
Beauchamp R M, Tanelli S, Peral E, et al. Pulse compression waveform and filter optimization for spaceborne cloud and precipitation radar[J]. IEEE Transactions on Geoscience & Remote Sensing, 2017, 55(2):915-931.
|
[6] |
Li Z, Santi F, Pastina D, et al. Multi-frame fractional Fourier transform technique for moving target detection with space-based passive radar[J]. IET Radar Sonar & Navigation, 2017, 11(5):822-828.
doi: 10.1049/rsn2.v11.5
|
[7] |
Georgis G, Lentaris G, Reisis D. Acceleration techniques and evaluation on multi-core CPU,GPU and FPGA for image processing and super-resolution[J]. Journal of Real-Time Image Processing, 2019(16):1207-1234.
|
[8] |
Amir H R, Taberner A J, Nash M P, et al. Suitability of recent hardware accelerators (DSPs, FPGAs, and GPUs) for computer vision and image processing algorithms[J]. Signal Processing Image Communication, 2018, 68(1):101-119.
doi: 10.1016/j.image.2018.07.007
|
[9] |
Ahmad S, Boppana V, Ganusov I, et al. A 16-nm multiprocessing system-on-chip field-programming gate array platform[J]. IEEE Micro, 2016, 36(2):48-62.
|
[10] |
Hwang Y S, Lin H H, Pai S H, et al. GPUBlocks:GUI programming tool for CUDA and OpenCL[J]. Journal of Signal Processing Systems, 2018, 91(2):235-245.
doi: 10.1007/s11265-018-1395-2
|
[11] |
Vasco A, Beatriz N, Miguel G, et al. Programming languages for data-Intensive HPC applications:A systematic mapping study[J]. Parallel Computing, 2020, 91(1):1-17.
|
[12] |
Zhu H M, Wu Y F, Li P, et al. A parallel non-local means denoising algorithm implemtation with OpenMP and OpenCL on Intel Xeon Phi[J]. Journal of Computational Science, 2016, 17(3):591-598.
doi: 10.1016/j.jocs.2016.07.001
|
[13] |
Dinan J, Balaji P, Buntinas D, et al. An implementation and evaluation of the MPI 3.0 one-sided communication interface[J]. Concurrency and Computation:Practice and Experience, 2016, 28(17):4385-4404.
doi: 10.1002/cpe.v28.17
|
[14] |
罗政. 基于多核众核架构的并行雷达信号处理算法研究[D]. 西安:西安电子科技大学, 2018.
|
|
Luo Zheng. Parallel radar signal processing based on multi-core and many core architecture[D].Xi'an: Xidian University, 2018.
|
[15] |
Yu J C, Li X M, Hu S Q, et al. Realization and optimization of pulse compression algorithm on OpenCL-Based FPGA heterogeneous computing platform[C]. Singapore:International Conference on Signal and Information Processing,Networking and Computers, 2017.
|
[16] |
Kharin A, Vityazev S, Vityazev V, et al. Parallel FFT implementation on TMS320c66x multicore DSP[C]. Piscataway:The Sixth European Embedded Design in Education and Research Conference, 2014.
|
[17] |
魏梦瑶. 基于X86架构CPU的雷达信号处理算法研究[J]. 电子科技, 2017, 30(5):55-57.
|
|
Wei Mengyao. Research on radar signal processing based on the X86 CPU[J]. Electronic Science and Technology, 2017, 30(5):55-57.
|
[18] |
杨来富. 基于刀片服务器的某雷达软件化设计与实现[D]. 西安:西安电子科技大学, 2019.
|
|
Yang Laifu. Software-based design and realization of the radar based on the blade server[D]. Xi’an:Xidian University, 2019.
|
[19] |
Shata K, Elteir M K, El-Zoghabi A A. Optimized implementation of OpenCL kernels on FPGAs[J]. Journal of Systems Architecture, 2019, 97(3):491-505.
doi: 10.1016/j.sysarc.2019.02.013
|
[20] |
魏可友, 黄康, 梁广, 等. 基于PRI的雷达信号综合分选方法[J]. 电子设计工程, 2017, 25(1):190-193.
|
|
Wei Keyou, Huang Kang, Liang Guang, et al. A new integrated method of radas signal sorting based on PRI[J]. Electronic Design Engineering, 2017, 25(1):190-193.
|