一种无滤波器的高效立体声D类音频功率放大器

• Original Articles • Previous Articles Next Articles

Design of a high efficiency and filterless stereo class-D audio power amplifier

LIU Lian-xi;YANG Yin-tang;ZHU Zhang-ming

(Ministry of Education Key Lab. of Wide Band-Gap Semiconductor Materials and Devices, Xidian Univ., Xi’an 710071， China)

Received:2008-08-27 Revised:1900-01-01 Online:2009-04-20 Published:2009-05-23
Contact: LIU Lian-xi E-mail:lxliu@mail.xidian.edu.cn

Abstract

Abstract: This paper presents a high efficiency stereo single-chip class-D power amplifier based on the CSMC 0.5μm DPDM CMOS process. Using a differential negative feedback scheme and a H-bridge output stage, it eliminates the output lowpass LC filter. Simulation results and measurements both show that when the THD+N is less than 0.5％, the power amplifier can deliver more than 3.5W×2 into 3Ω loads without a filter at the power supply voltage of 5V. The maximal efficiency of the amplifier is up to 90％ from 3V to 6V of the power supply voltage. It achieves the THD+N of each channel of less than 0.1％, when the delivered power is less than 3.0W and the supply voltage is 5V.

Key words: audio power amplifier, filterless, integral feedback, total harmonic distortion

CLC Number:

TN402

LIU Lian-xi;YANG Yin-tang;ZHU Zhang-ming. Design of a high efficiency and filterless stereo class-D audio power amplifier
[J].J4, 2009, 36(2): 308-313.

[1]	NGUYEN Van-Truong,CAI Jueping,WEI Linyu,CHU Jie. Low complexity probability-based piecewise linear approximation of the sigmoid function [J]. Journal of Xidian University, 2020, 47(3): 58-65.
[2]	WU Qiufeng,ZHANG Yuejun,WANG Pengjun,ZHANG Huihong. Hardware obfuscation design of the RM logical camouflage gate [J]. Journal of Xidian University, 2020, 47(2): 135-141.
[3]	ZHANG Yan;YANG Yintang. Novel distributed optimal interconnection power model [J]. J4, 2014, 41(4): 36-40+192.
[4]	LIU Maliang;ZHU Zhangming;GUO Xulong;YANG Yintang. 4-channel-interpolated 14-bit high speed CORDIC DDS IP core [J]. J4, 2013, 40(6): 62-66.
[5]	YUAN Bo;LIU Hongxia. Optimization methodology for the width of the fixed-point decimal multiplier [J]. J4, 2013, 40(5): 113-118.
[6]	YUAN Bo;LIU Hongxia. Optimization methodology for the number of additions in multiplier [J]. J4, 2013, 40(3): 102-108.
[7]	LIU Yi;CHEN Bo;YANG Yintang;LIU Gang. High-speed low-power clock network design for NoC [J]. J4, 2013, 40(3): 115-120.
[8]	LI Xiaojuan;YANG Yintang. Offset cancellation preamplifier for pipelined folding A/D converter [J]. J4, 2012, 39(2): 95-100+174.
[9]	YANG Yanfei;ZHU Zhangming;ZHOU Duan;YANG Yintang. Delay-independent asynchronous dynamic priority arbiter for the network on chips [J]. J4, 2012, 39(1): 42-48+110.
[10]	LIU Lianxi;YANG Yintang;ZHU Zhangming. Design of a high output power step down DC/DC converter with the peak current control mode [J]. J4, 2011, 38(2): 135-140.
[11]	SHAN Guang-bao1;YANG Yin-tang2;LIU You-bao1;ZHU Zhang-ming2. Modeling of the micro-silicon gyroscope [J]. J4, 2007, 34(2): 227-232.
[12]	YANG Yin-tang;REN Le-ning;FU Jun-xing. Ultra-low voltage operational amplifier based on quasi-floating gate transistors [J]. J4, 2005, 32(4): 501-503.
[13]	LIU Lian-xi;YANG Yin-tang;ZHU Zhang-ming. A low voltage and high accuracy CMOS bandgap reference by considering mismatch of MOSFETs [J]. J4, 2005, 32(3): 348-352.
[14]	ZHU Zhang-ming;YANG Yin-tang. A sub-１V PTAT voltage reference based on the bulk-driven technique [J]. J4, 2005, 32(3): 367-369.
[15]	ZHU Zhang-ming;YANG Yin-tang;YIN Tao. A novel low voltage high precision CMOS current reference [J]. J4, 2005, 32(2): 174-178.

Design of a high efficiency and filterless stereo class-D audio power amplifier

PDF (PC)

Like

Knowledge

Abstract

Cite this article

share this article

References

Related Articles 15

Metrics

Comments

Recommended 10