关键词: IRIG-B码, 解码, 毛刺

Abstract:

To solve the problem of low decoding accuracy and poor working stability of an IRIGB decoder based on the single chip microcomputer,this paper describes an IRIGB decoding hardware implementation based on FPGA.In the process of implementation,emphasis is put on analyzing and processing burrs introduced by the IRIGB code signal.The influence on the stability of the system caused by burrs is thoroughly eliminated by the method of three level D flipflop followed by OR gate.This system has the advantages of higher decoding precision,stability and easy implementation.

Key words: IRIGB;decoding;burr