基于FPGA的PTP时间同步技术实现

doi:10.16180/j.cnki.issn1007-7820.2019.11.009

Abstract

Abstract:

Aiming the problem of complexity, redundant structure and high cost in the implementation scheme of the existing PTP technology, this paper proposed an implementation scheme of PTP time synchronization technology based on FPGA. The timestamps of Sync and Delay_req messages were intercepted in the data link layer by establishing four kinds of messages between systems of FPGA which had the master-slave structure. Then, slave system calculated the link delay and time offset according to timestamps. Finally, the local clock of slave system was compensated to achieve the goal of time synchronization. ChipScope Pro tool provided by Xilinx was used to capture the time information of master and slave system, as well as to test time accuracy and success rate for board level verification in this study. The experimental results showed that the designed system could reach nanosecond accuracy in time synchronization, and the success rate of synchronization was basically maintained at 99.99%.

Key words: PTP, timesynchronization, delay, offset, synchronizationprecision, success rate

CLC Number:

TN91

FANG Xiaoyu,WANG Jingmei,YAN Zijie,CHEN Zhuo. Implementation of PTP Time Synchronization Technology Based on FPGA[J].Electronic Science and Technology, 2019, 32(11): 43-47.

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References 17

[1]	IEEE. IEEE Std 1588-2002,IEEE standard for a precision clock synchronization protocol for networked measurement and control system[S]. New York:IEEE, 2002.
[2]	IEEE. IEEE Std 1588-2008,IEEE standard for a precision clock synchronization protocol for networked measurement and control system[S]. New York:IEEE, 2008.
[3]	Crossley P A, Guo H, Ma Z . Time synchronization for transmission substations using GPS and IEEE 1588[J]. CSEE Journal of Power and Energy Systems, 2016,2(3):91-99.
[4]	Astarloa A, Moreira N, Bidarte U , et al. FPGA based nodes for sub-microsecond synchronization of cyber-physical production systems on high availability ring networks[C].Mexico City:International Conference on ReConFigurable Computing and FPGAs( ReConFig), 2015.
[5]	Oliver D, Otto A J, Neufeld N . A study of the merits of precision time protocol (IEEE-1588) across high-speed data networks[M]. Meyrin:CERN, 2015.
[6]	Le Pallec M, Bui D T. Automatic capture of the network delay components:U.S.,patent application,9413625[P]. 2016-08-09.
[7]	Ruffini S, Gray E W, Kini S, et al.Transmitting residence time information in a network:U.S.,Patent Application,15/524540[P]. 2017 -11-09.
[8]	Dong M, Qiu Z, Pan W , et al. The design and implementation of IEEE 1588v2 clock synchronization system by generating hardware timestamps in MAC layer[C].Colmar:International Conference on Computer, Information and Telecommunication Systems(CITS) , 2018.
[9]	Fubin P, Yubo Y, Lei G, et al.The accuracy of IEEE 1588 time synchronization protocol and its improvement [C]. Qingdao:12^th IEEE International Conference on Electronic Measurement & Instruments (ICEMI) , 2015.
[10]	郑恭明, 沈媛媛 . 基于FPGA的GPS同步时钟系统设计[J]. 桂林理工大学学报, 2015,35(1):198-201.
	Zheng Gongming, Shen Yuanyuan . Design of GPS synchronous clock system based on FPGA[J]. Journal of Guilin University of Technology, 2015,35(1):198-201.
[11]	魏建新 . IEEE1588时钟同步技术在飞行试验遥测网络系统中的应用[J]. 计算机测量与控制, 2015,23(4):1115-1117.
	Wei Jianxin . Application of IEEE1588 clock synchronization technology in network system of flight test telemetry[J]. Computer Measurement and Control, 2015,23(4):1115-1117.
[12]	Kero N, Kernen T, Muller T , et al. Optimizing large media networks for highly accurate time transfer via PTP[J]. SMPTE Motion Imaging Journal, 2016,125(2):30-44.
[13]	杜慧琦, 刘玥, 刘博 , 等. IEEE1588v2时钟同步技术在战术信息系统中的应用[J]. 计算机应用与软件, 2017,34(11):125-129.
	Du Huiqi, Liu Yue, Liu Bo , et al. Application of IEEE1588v2 clock synchronization technology in tactical information system[J]. Computer Applications and Software, 2017,34(11):125-129.
[14]	Yin H, Fu P, Qiao J, et al.The implementation of IEEE 1588 clock synchronization protocol based on FPGA [C].Houston:IEEE International Instrumentation and Measurement Technology Conference ( I ²MTC ), 2018.
[15]	Esquembri S, Sanz D, Barrera E , et al. Hardware timestamping for an image acquisition system based on FlexRIO and IEEE 1588 v2 standard[J]. IEEE Transactions on Nuclear Science, 2016,63(1):228-235.
[16]	李文辉, 简献忠, 肖儿良 . 变电站实时监控系统中的千兆以太网传输设计[J]. 电子科技, 2018,31(1):16-19,33.
	Li Wenhui, Jian Xianzhong, Xiao Erliang . Design of gigabit Ethernet transmission in real-time monitoring system of substation[J]. Electronic Science and Technology, 2018,31(1):16-19,33.
[17]	陈凯, 唐清善, 李亚捷 , 等. 基于FPGA的千兆以太网传输实现方案[J]. 电子科技, 2017,30(6):102-104,108.
	Chen Kai, Tang Qingshan, Li Yajie , et al. Implementation scheme of gigabit Ethernet transmission based on FPGA[J]. Electronic Science and Technology, 2017,30(6):102-104,108.

序号	同步次数/次	捕获次数/次	成功率
1	20 000	19 998	99.990 0%
2	40 000	39 997	99.992 5%
3	60 000	59 995	99.991 7%
4	80 000	79 991	99.988 8%

Implementation of PTP Time Synchronization Technology Based on FPGA

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