Electronic Science and Technology ›› 2019, Vol. 32 ›› Issue (11): 43-47.doi: 10.16180/j.cnki.issn1007-7820.2019.11.009

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Implementation of PTP Time Synchronization Technology Based on FPGA

FANG Xiaoyu,WANG Jingmei,YAN Zijie,CHEN Zhuo   

  1. School of Electronic Science and Engineering,University of Electronic Science and Technology of China,Chengdu 610054,China
  • Received:2018-11-27 Online:2019-11-15 Published:2019-11-15
  • Supported by:
    The Fundamental Research Funds for the Central Universities(ZYGX2016J162)


Aiming the problem of complexity, redundant structure and high cost in the implementation scheme of the existing PTP technology, this paper proposed an implementation scheme of PTP time synchronization technology based on FPGA. The timestamps of Sync and Delay_req messages were intercepted in the data link layer by establishing four kinds of messages between systems of FPGA which had the master-slave structure. Then, slave system calculated the link delay and time offset according to timestamps. Finally, the local clock of slave system was compensated to achieve the goal of time synchronization. ChipScope Pro tool provided by Xilinx was used to capture the time information of master and slave system, as well as to test time accuracy and success rate for board level verification in this study. The experimental results showed that the designed system could reach nanosecond accuracy in time synchronization, and the success rate of synchronization was basically maintained at 99.99%.

Key words: PTP, timesynchronization, delay, offset, synchronizationprecision, success rate

CLC Number: 

  • TN91