多核处理器共享Cache的划分算法

doi:10.16180/j.cnki.issn1007-7820.2024.09.005

Abstract

Abstract:

In order to optimize the performance of multi-core processors, this study deeply investigates the management strategy of shared Cache on multi-core processors, and proposes a shared Cache partitioning algorithm MT-FTP(Memory Time based Fair and Throughput Partitioning) based on the fairness of cache time and throughput rate. A mathematical model based on the fairness and throughput index is established, and the partitioning flow of the algorithm is analyzed in the proposed study. The simulation results show that the MT-FTP algorithm has excellent performance in system throughput, and its average IPC (Instructions Per Cycles) value is 1.3% higher than that of UCP(Use Case Point) algorithm and 11.6% higher than that of LRU (Least Recently Used) algorithm. The average fairness of MT-FTP algorithm is 17% higher than that of LRU algorithm, and 16.5% higher than that of UCP algorithm. This algorithm realizes the fairness of shared Cache partition and takes into account the throughput of the system.

Key words: chip multi-processor, memory wall, partition, fairness, throughput rate, shared Cache, cache time, integrated computer

CLC Number:

TP316.2

LÜ Haiyu, LUO Guang, ZHU Jiawei, ZHANG Fengdeng. Research on Shared Cache Partition Algorithm Based on Multi-Core Processors[J].Electronic Science and Technology, 2024, 37(9): 27-33.

Figures/Tables 7

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Table 1.

Figure 6.

References 18

[1]	Suo G, Yang X, Liu G, et al. IPC-based cache partitioning:An IPC-oriented dynamic shared cache partitioning mechanism[C]. Daejeon: International Conference on Convergence and Hybrid Information Technology, 2018:399-406.
[2]	Kim S, Chandra D, Solihin D. Fair cache sharing and partitioning in a chip multiprocessor architecture[C]. Antibes: Proceedings of the Thirteenth International Conference on Parallel Architectures and Compilation Techniques, 2014:111-122.
[3]	Chen X, Xiao H, Wardi Y, et al. Throughput regulation in shared memory multicore processors[C]. Bengaluru: IEEE the Twenty-second International Conference on High Performance Computing, 2015:12-20.
[4]	Qiu T, Liu X, Han M, et al. SRTS:A self-recoverable ti-me synchronization for sensor networks of healthcare IoT[J]. Computer Networks, 2017, 12(9):481-492.
[5]	王天一, 高博. 分布式实时系统数据分发服务DDS技术研究[J]. 电子科技, 2020, 33(8):40-45.
	Wang Tianyi, Gao Bo. Research on data distribution service of distributed real-time system[J]. Electronic Science and Technology, 2020, 33(8):40-45.
[6]	Gao C, Zhao G R, Lu J H, et al. Decentralised moving-horizon state estimation for a class of networked spatial-navigation systems with random parametric uncer-tainties and communication link failures[J]. IET Control Theory and Applications, 2015, 9(18):2666-2677.
[7]	赵龙飞, 李晓婷, 丁振兰, 等. 基于SPEC CPU2017的CPU性能对比分析[J]. 电子产品可靠性与环境试验, 2021, 39(S1):55-59.
	Zhao Longfei, Li Xiaoting, Ding Zhenlan, et al. A comparative analysis of CPU performance based on SPECCPU2017[J]. Electronic Product Reliability and Environmental Testing, 2021, 39(S1):55-59.
[8]	Liu C, Sivasubramaniam A, Kandemir M. Organizing thelast line of defense before hitting the memory wall for cmps[C]. Madrid: IEEE the Tenth International Symposium on High Performance Computer Architecture, 2014:175-179.
[9]	Qureshi M K, Patt Y N. Utility-based cache partitioning:A low-overhead,high-performance,runtime mechanismto partition shared caches[C]. Orlando: Proceedings of the Thirty-ninth Annual IEEE/ACM International Symposium on Microarchitecture, 2016:423-432.
[10]	刘让, 张凤登. FlexRay时钟同步拜占庭故障容错算法研究[J]. 软件导刊, 2020, 19(1):68-74.
	Liu Rang, Zhang Fengdeng. Research on fault tolerant algorithm of Byzantine fault in FlexRay clock synchronization[J]. Software Guide, 2020, 19(1):68-74.
[11]	康立毅, 陈晓, 王劲林. 择优同步分布式时钟同步系统设计[J]. 网络新媒体技术, 2019, 8(1):53-57.
	Kang Liyi, Chen Xiao, Wang Jinlin. Design of distributed clock synchronization system by selecting execllent network nodes to synchronize with[J]. Network New Media Technology, 2019, 8(1):53-57.
[12]	Xie Y, Loh G H. Pipp:Promotion/insertion pseudo-partit-ioning of multicore shared caches[J]. ACM SIGARCH Computer Architecture News, 2019, 37(3):174-183.
[13]	Liu L, Qi D. An independent task scheduling algorithmin heterogeneous multicore processor environment[C]. Chongqing: IEEE the Third Advanced Information Technology,Electronic and Automation Control Conference, 2018:142-146.
[14]	方娟, 李成艳, 王帅, 等. 一种基于频率的多核共享Cache替换算法[J]. 电子与信息学报, 2014, 36(5):1229-1234.
	Fang Juan, Li Chengyan, Wang Shuai, et al. A frequency based Cache replacement algorithm with partition of C-MPs[J]. Journal of Electronics and Information Technology, 2014, 36(5):1229-1234.
[15]	Xu W, Sun H, Wang X, et al. Design of last-level on-chip Cache using spin-torque transfer RAM[J]. IEEE Transactions on Very Large-Scale Integration Systems, 2011, 19(3):483-493.
[16]	Gao C, Zhao G R, Lu J H, et al. Decentralised moving-horizon state estimation for a class of networked spatial-navigation systems with random parametric uncertainties and communication link failures[J]. IET Control Theory and Applications, 2015, 9(18):2666-2677.
[17]	Austin T, Larson E, Dan E. Simple scalar:An infrastructure for computer system modeling[J]. Computer, 2012, 35(2):59-67.
[18]	Wulf W A, Mckee S A. Hitting the memory wall:Implications of the obvious[J]. ACM Sigarch Computer Architecture News, 1995, 23(1):20-24.

编号	测试用例
MIX₁	applu, mcf, gap, wvpwise
MIX₂	mcf, gap, gzip, perlbmk
MIX₃	ammp, twlf, apsi, parser
MIX₄	ammp, twlf, applu, mcf
MIX₅	ammp, parser, gzip, perlbmk
MIX₆	gzip, perlbmk, apsi, parser
MIX₇	ammp, twolf, crafty, mesa
MIX₈	gzip, perrbmk, crafty, mesa
MIX₉	gzip, ammp, applu, perlbmk
MIX₁₀	mesa, crafty, perbmk, applu

Research on Shared Cache Partition Algorithm Based on Multi-Core Processors

RichHTML

PDF (PC)

Like

Knowledge

Abstract

Cite this article

share this article

Figures/Tables 7

References 18

Related Articles 12

Metrics

Comments

Recommended 0

[1]	LUO Guang, MAO Hang, ZHU Yangshuo, ZHANG Fengdeng. Real-Time Hybrid Task Scheduling Algorithm in Embedded Multicore System [J]. Electronic Science and Technology, 2024, 37(8): 84-91.
[2]	ZHU Jiawei, MAO Hang, ZHANG Fengdeng. Research on Hybrid Critical-Level Task Scheduling and Semi-Partition Algorithm in Multi-Core Processor [J]. Electronic Science and Technology, 2024, 37(3): 1-9.
[3]	ZHANG Haitao,ZHANG Tong,ZHANG Yuhui,GUAN Yinfeng,ZHANG Fengdeng. Task Partitioning Optimization Algorithm Based on MrsP Protocol [J]. Electronic Science and Technology, 2023, 36(3): 36-41.
[4]	GUAN Yinfeng,ZHANG Fengdeng,ZHANG Haitao,ZHANG Yuhui. Improvement of Earliest Deadline First Algorithm in CAN FD Bus [J]. Electronic Science and Technology, 2023, 36(2): 29-36.
[5]	LIN Yuhong,XIAO Hao. Security Design of eFlash Controller Based on AES Algorithm [J]. Electronic Science and Technology, 2023, 36(10): 62-67.
[6]	ZHANG Xuan,ZHANG Duoli,SONG Yukun. Optimization of the Internal Memory Architecture of Heterogeneous Multi-Core SoC Processors [J]. Electronic Science and Technology, 2022, 35(9): 44-51.
[7]	Weiyi LIU,Yanan SUN,Weifeng HE. Design of Ternary Logic-in-Memory Based on RRAM Dual-Crossbars [J]. Electronic Science and Technology, 2022, 35(4): 8-13.
[8]	SHI Yuyu，YU Jinming，LI Xue. Dynamic Partitioned Clustering Routing Algorithm Based on Energy and Density for WSNs [J]. , 2016, 29(6): 47-.
[9]	DUAN Haijun,CHEN Fu,FENG Junbo,HAN Chunyang. Design of Avionics System Network File System [J]. , 2016, 29(4): 95-.
[10]	QIU Yanling. Maximum Delay of Two-person Cooperative Scheduling Games [J]. , 2015, 28(3): 72-.
[11]	LI Jing-Jing, LUO Ding-Li, XIANG Cong. A Study of Clutter Partitioned Suppressing for Airborne Fire-control Radar [J]. , 2013, 26(4): 133-.
[12]	DING Xiao-Gui, LIU Gui-Jiang. Global Fairness Schedule Scheme for HSDPA Relay System [J]. , 12, 25(7): 72-.